EDN

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Through Cadence's support of the ARM MBIST interface, customers can deliver innovative SoC designs to market faster and with better power, performance and area (PPA). For example, the Modus Test ...
EDN

ITC: Chipmakers employ Cadence test technology

Representatives of Cadence Design Systems were on hand at the International Test Conference to report that companies including K-micro, LSI, G2 Microsystems, and IBM have made use of Cadence’s ...
Business Wire

Cadence Demonstrates IP Test Silicon for PCI Express 6.0 Specification on TSMC N5 Process

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the immediate availability of Cadence ® IP supporting the PCI Express ® (PCIe ®) 6.0 specification on the ...
Business Wire

Cadence Perspec System Verifier Supports New Accellera Portable Test and Stimulus Specification 1.0

SAN FRANCISCO--(BUSINESS WIRE)--DESIGN AUTOMATION CONFERENCE—Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence ® Perspec™ System Verifier supports the new Accellera Portable ...
Nasdaq

Cadence Delivers Portable Test and Stimulus Methodology and Library

Highlights: Cadence delivers Portable Stimulus Methodology and Library: A Portable Test and Stimulus Specification-compliant source code form of the popular Perspec System Methodology Library and PSS ...